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Re: Right :)

Howdy

I was referring to designs that don't use PLLs (nor ASRC) at all, but instead have separate crystals for each mode, for example, for 44.1k and it's multiples and another for 48k and it's multiples. After all there is nothing wrong with having the proper crystal clock for each freq. Tho I don't know specifically who does or doesn't do it. (Does the Sony DVP-S9000ES?)

I don't know what you mean by your S/PDIF clock statement, if you are referring to using an extra S/PDIF connection to send the clock from the DAC back to the transport, yep people have done that for a while, but that's one implementation of what I was talking about. If you were referring to Ed's patent about using only the bits in the header info of the protocol of S/PDIF that never change as the bits to synchronize to for running a PLL, well that is clearly inferior to sending the clock explicitly back from the DAC to the source to gather up the bits... Even a good PLL is inferior to no PLL. (Of course implementation is everything and can swamp all of this technical stuff.)

-Ted

P.S. Good to see you around too.

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