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In Reply to: Re: PCM2706 i2s format... (John Sw?) posted by John Swenson on March 8, 2006 at 23:59:59:
It made things alot clearer. Thank you very much, John.Regarding the bit shifts, as I get it, I start out with left justified 16-bit data arriving in 32-bit frames. Two of these frames makes up the 64-bit frame for the 1704... ergo, I have in two frames from the 2706:
16 bits of data (left channel)
16 bits of zeros
16 bits of data (right channel)
16 bits of zerosWich I will have to shift so I get this structure for each 1704:
8 bits of 0's
16 bits of junk (to be ignored by the DAC)
16 bits of 0's
16 bits of data to be decoded
8 bits of 0'sSummed up, I find I will need to shift the right data by 8 bits, and the left by 40 bits. Is this correct?
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Follow Ups
- Re: PCM2706 i2s format... (John Sw?) - Raab 04:44:52 03/09/06 (6)
- Only delay them 7 bits - Gordon Rankin 06:59:44 03/09/06 (5)
- Re: Only delay them 7 bits - Raab 08:00:29 03/09/06 (4)
- Re: Only delay them 7 bits - Gordon Rankin 08:58:18 03/09/06 (3)
- Re: Only delay them 7 bits - Raab 10:19:22 03/09/06 (2)
- Re: Only delay them 7 bits - Gordon Rankin 08:19:55 03/10/06 (1)
- I'm listening :) - Raab 18:20:22 03/10/06 (0)
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